As AI models evolve from training toward advanced inference and Agentic AI, the infrastructure focus is quietly shifting from compute-driven to memory-driven.

Facing the increasingly daunting Memory Wall, prominent investment bank Bernstein noted in a newly released in-depth research report that High Bandwidth Flash (HBF) is expected to be the key breakthrough. This technology could not only significantly reduce AI inference costs but may also bring a restructuring effect to the NAND industry — mired in cyclical troubles — similar to what HBM brought to the DRAM industry.

AI's evolution is giving rise to the Memory Wall, with inference and agents becoming major compute consumers, Bernstein noted in its report. AI technology iteration is reshaping underlying hardware demand. During the training phase, GPUs and HBM (High Bandwidth Memory) occupied the core position; but as large language model parameter scales expand exponentially, context windows continuously lengthen (approaching or exceeding 1 million tokens), and agents demand persistent interaction, massive data volumes have far exceeded HBM's economical capacity boundary, gradually spilling over to broader storage tiers including traditional DRAM, NAND flash, and even HDDs and tape.

Analyst Mark C. Newman and his team emphasized in the report that the inference process, especially the decoding phase, is a classic memory-bandwidth-bound scenario. Under Mixture of Experts (MoE) architecture, although only a subset of experts is activated per inference, the massive total parameter set still needs to be on standby at all times. Additionally, KV Cache mechanisms create enormous economic incentives — currently, mainstream AI labs and Google price cached token reads at only about 10% of fresh input tokens. This means that to avoid expensive repeated computation, systems require larger capacity and higher bandwidth memory to store and reuse prior context. Simply adding compute can no longer improve system utilization — memory capacity and bandwidth are becoming the core bottleneck constraining AI development.

HBF architecture emerges: combining HBM-level bandwidth with 8-16x capacity. To cross this Memory Wall, HBF technology has emerged. Through a highly parallel, wide-interface architecture, it stacks NAND flash, aiming to deliver read bandwidth approaching HBM while achieving an 8 to 16 times capacity leap, with per-GB cost significantly lower than HBM. In the HBM+HBF tiered architecture proposed by SanDisk Corp (NASDAQ: SNDK), the smaller-capacity but ultra-low-latency HBM continues to serve as a high-speed cache for the most active working sets, while HBF serves as a capacity tier for storing massive model parameters (such as inactive experts in MoE architecture) and warm/cold KV cache data. The H3 architecture previously proposed by SK Hynix Inc (OTC: SKHY) also corroborates this approach.

The economic benefits of this architecture are extremely significant. SanDisk's simulation tests (based on the Qwen3-480B-A35B model) show that under a pure HBF configuration, only 1 GPU is needed to run a 960GB bfloat16 model, while a pure HBM solution requires a minimum of 8 GPUs. Even in scenarios requiring equivalent token output, 4 HBF GPUs can match the performance of 8 HBM GPUs. By dramatically reducing dependence on expensive GPUs and HBM, HBF not only lowers per-GB memory costs but also optimizes capital expenditure and power consumption at the system level, achieving an architectural leap that avoids redundant computation.

Wafer consumption ratio reaches 6.5x, yet gross margins rival HBM. From an economic perspective, HBF's profit-enhancing effect on the NAND supply chain is highly imaginative. Because it uses high-performance, high-endurance SLC (Single-Level Cell) flash and requires additional silicon area to accommodate TSVs and peripheral circuits, Bernstein estimates HBF's wafer trade ratio at 6.5x, far exceeding HBM's 3x; its manufacturing cost ratio is approximately 10x that of enterprise-grade SSDs (eSSD). However, thanks to its extremely high premium capability, if HBF is priced at module unit prices similar to HBM (but offering 8-16x capacity), its gross margin could reach an astonishing 80%-90%, essentially on par with the NAND industry's current top profitability levels, while substantially boosting revenue and profit. The report's baseline estimates show that under 2027 HBM ASP expectations, the gross margin centers for 8-hi and 16-hi HBF modules would reach 86.5% and 88.9% respectively.

Reshaping NAND supply-demand dynamics: a Jevons Paradox similar to HBM's impact on DRAM. HBF's adoption is expected to bring structural benefits to the NAND industry similar to what HBM brought to DRAM. On one hand, the 6.5x wafer consumption ratio means that even if HBF achieves only 10%-20% migration rate, it would cause industry wafer demand to surge by 20%-120%. Against the backdrop of slow fab capacity expansion and massive capital expenditure, this would significantly tighten NAND supply-demand balance, supporting prices and profit margins. On the other hand, HBF creates entirely new AI-driven demand, breaking the zero-sum game of traditional enterprise SSDs. The market widely fears that HBF will cannibalize HBM demand, but Bernstein believes the two are more complementary. Although HBF reduces the HBM capacity needed for storing model parameters, it cannot replace HBM used for active computation and token generation. Lower AI inference costs will accelerate AI application adoption, and according to the Jevons Paradox, overall efficiency gains may actually stimulate larger-scale AI deployment, driving exponential growth in total demand for HBM, GPUs, and NAND.

Ecosystem competition and deployment challenges: Nvidia's absence and SanDisk's ambitions. Despite the broad prospects, HBF's full commercialization still faces architectural limitations and ecosystem challenges. Since the underlying technology remains NAND, HBF's read latency is in the microsecond range, unable to reach DRAM's nanosecond level; its write performance and endurance also have ceilings. Therefore, HBF is more suitable for read-heavy, write-light inference scenarios. The more fundamental challenge lies in ecosystem support. Currently, the HBF Alliance has attracted giants including SanDisk Corp (NASDAQ: SNDK), SK Hynix Inc (OTC: SKHY), Alphabet Inc (NASDAQ: GOOGL), Meta Platforms Inc (NASDAQ: META), and Tenstorrent, but industry bellwether Nvidia Corp (NASDAQ: NVDA) has not yet explicitly endorsed it. On the contrary, Nvidia Corp (NASDAQ: NVDA) is actively promoting its CMX (Content Memory Storage) platform and Storage Next solution. Additionally, Taiwan Semiconductor Manufacturing Co (NYSE: TSM) has not yet disclosed advanced packaging (CoWoS) capacity plans for HBF.

As HBF's core driver, SanDisk Corp (NASDAQ: SNDK) is leveraging its vertical integration advantages in NAND IP, front-end manufacturing (through its joint venture with Kioxia), and system-level packaging to push HBF toward commercialization. According to disclosures, SanDisk's first-generation HBF product has successfully taped out and is planned to launch initial inference-oriented samples in 2027, while the second-generation product will target 100-billion-parameter-class models in the edge computing domain.

Overall, HBF offers a highly cost-effective evolutionary path for breaking through AI's Memory Wall. Although the road ahead remains constrained by latency shortcomings and ecosystem decisions by major players like Nvidia Corp (NASDAQ: NVDA), once it achieves scale deployment, it will undoubtedly inject strong structural growth momentum into the NAND industry, ushering in the HBF era of the storage industry.