Morgan Stanley has revised upward its projections for Taiwan Semiconductor Manufacturing's (TSMC) advanced packaging (CoWoS) capacity, forecasting that a more than 20% expansion will be required by late 2026 to match the growth in 3nm chip production. This adjustment underscores the immense supply chain pressure driven by surging AI demand.

According to industry sources, Morgan Stanley analysts, including Tiffany Yeh, stated in a report released on the 17th that TSMC’s monthly CoWoS capacity is now expected to reach at least 120,000–130,000 wafers, up from the previous estimate of 100,000. This significant revision is based on the firm’s latest industry survey.

The report highlights that following NVIDIA CEO Jensen Huang’s visit to Taiwan to secure capacity for its next-generation "Rubin" platform, TSMC has decided to add 20,000 wafers per month of 3nm front-end capacity. To support this front-end expansion, a corresponding increase in back-end advanced packaging capacity has become imperative.

The additional capacity will be deployed at the AP8 P1 and P2 facilities, with the timeline dependent on construction progress and equipment installation. Morgan Stanley views this expansion as a positive development for the CoWoS supply chain and AI semiconductor clients. The firm notes that the decision is particularly favorable for CoWoS equipment suppliers, which have underperformed in 2025, while AI ASIC customers relying on 3nm capacity—supported by design service firms like Alchip and Faraday—also stand to benefit.

**CoWoS Capacity Racing to Match 3nm Demand** Per Morgan Stanley’s AI tracking report, TSMC’s decision to boost 3nm front-end capacity by 20,000 wafers has prompted parallel plans for a substantial CoWoS expansion. This move follows Huang’s visit to secure Rubin platform capacity.

The firm estimates that CoWoS capacity will reach at least 120,000–130,000 wafers per month by late 2026, a significant increase from the earlier baseline of 100,000. This over-20% expansion aims to align with the rising demand for 3nm process technology.

Morgan Stanley emphasizes that CoWoS, as a critical advanced packaging technology, underpins high-performance AI chips. With 3nm entering mass production, matching packaging capacity must scale simultaneously to meet AI clients’ delivery requirements.

The report adds that new CoWoS capacity will be allocated to phases P1 and P2 at the AP8 fab. However, the rollout timeline remains contingent on construction and equipment installation, introducing potential variability.

**Equipment and Service Providers Poised to Gain** TSMC’s expansion is expected to fuel growth across the semiconductor supply chain, with equipment and service providers positioned as early beneficiaries.

Morgan Stanley describes the capacity hike as "highly positive" for CoWoS equipment suppliers, noting their underperformance in 2025. The firm reiterates "Overweight" ratings on AllRing and ASMPT, citing AllRing as TSMC’s primary osmium (OS) supplier and ASMPT as the sole provider of thermal compression bonding (TCB) equipment for CoWoS-L substrates.

Among service providers, Morgan Stanley maintains "Overweight" ratings on ASE Technology and KYEC. AI ASIC clients leveraging 3nm capacity through design services from firms like Alchip and Faraday are also flagged as beneficiaries.