The escalating computational demands of artificial intelligence are reshaping the semiconductor landscape, shifting from a GPU-dominated paradigm toward a parallel expansion of both GPUs and custom-designed chips. JPMorgan's latest autumn 2026 US semiconductor and equipment industry update projects that ASIC/XPU shipments will account for 54% of AI accelerator unit volumes by 2027, surpassing GPUs, and will further climb to 55% by 2028.

The bank estimates the custom AI ASIC market will reach approximately $60 billion to $70 billion in 2026, with a compound annual growth rate exceeding 40% to 50% over the coming years. Currently, Broadcom and Marvell Technology dominate roughly 90% of this market, with Broadcom alone holding an estimated 80% to 85% share, reflecting a highly concentrated competitive landscape.

The report also highlights that the limited supply chain visibility for custom chip projects such as Google's TPU does not necessarily indicate a lack of order certainty. The five-year TPU supply agreement between Broadcom and Google, spanning 2026 to 2031, encompasses 3nm, 2nm, and advanced packaging technologies, and includes逐年 escalating TPU revenue arrangements, providing robust revenue visibility for the associated AI business operations.

On a broader scale, AI capital expenditure remains the most critical demand pillar for the semiconductor industry. JPMorgan projects global semiconductor industry revenue growth of 118% year-over-year in 2026, or 32% when excluding memory, followed by 35% overall growth in 2027, or 18% excluding memory. During the same period, wafer fabrication equipment spending is expected to increase by 31% and 38%, respectively, as AI, memory, and traditional chip demand collectively sustain the industry cycle's momentum.

ASIC acceleration drives custom chips as a major AI compute growth contributor

Hyperscale cloud providers are accelerating their development of ASIC/XPU solutions, not merely to substitute for GPUs, but to optimize performance, power consumption, and per-token costs for specific workloads while reducing dependence on general-purpose GPU supply chains.

This trend is transforming the product mix of AI accelerators. JPMorgan forecasts ASIC/XPU share of AI accelerator unit shipments at approximately 41% in 2026, rising to 54% in 2027, and reaching 55% by 2028. Custom chips are evolving from supplementary solutions to scale deployments, becoming a significant incremental driver of AI infrastructure expansion.

The custom AI ASIC market currently exhibits a high degree of concentration, with Broadcom and Marvell Technology jointly commanding approximately 90% of the share. As cloud providers including Google, Amazon, and Microsoft advance their proprietary AI chip initiatives, demand for ASIC design and related supporting services retains substantial growth headroom.

Broadcom's TPU information opacity does not equate to order uncertainty

One prevailing market question regarding Broadcom's AI business concerns the limited supply chain disclosures for projects such as Google's TPU, which make it difficult for external observers to fully track orders and shipment volumes. However, JPMorgan contends that constrained supply chain information alone cannot substantiate weakening demand, and that greater emphasis should be placed on customer agreements, product iterations, and capacity planning metrics.

Taking Google's TPU as an example, the supply agreement between Broadcom and Google spans five years, covering 2026 through 2031, and extends across 3nm, 2nm, and advanced packaging architectures. The agreement also incorporates逐年 escalating TPU revenue provisions, ensuring that orders and revenues maintain strong visibility even when supply chain details are not fully transparent.

Marvell Technology similarly benefits as cloud providers' proprietary chips enter mass production, with its custom chip business spanning projects such as Amazon's Trainium, Microsoft's Maia, and Google's XPU. As proprietary accelerators transition from early-stage deployment to scaled manufacturing, ASIC design, interconnect, and advanced packaging segments will experience synchronized growth.

Sustained AI capex reinforces WFE and memory cycle strength

JPMorgan projects global cloud capital expenditures of $953 billion, $1.41 trillion, and $1.54 trillion for CY26, CY27, and CY28, respectively. As AI investment returns become increasingly evident, the economic incentives for cloud service providers to maintain elevated infrastructure spending levels are strengthening.

Equipment spending remains robust as well. Global WFE expenditure is expected to grow 31% year-over-year in 2026 to approximately $225 billion, followed by another 38% increase in 2027 to roughly $263 billion. Advanced node capacity expansion and new DRAM capacity additions will jointly drive equipment demand, while cleanroom space constraints are prompting some equipment purchases to be accelerated.

Memory constitutes another critical support pillar. JPMorgan forecasts blended DRAM and NAND average selling price increases of approximately 250% in 2026, followed by further gains of about 30% and 25%, respectively, in 2027. AI servers are boosting DRAM demand, while enterprise SSDs serve as a major source of NAND consumption, with long-term procurement agreements and relatively restrained capital expenditure helping to prevent rapid supply imbalances.

Overall, JPMorgan believes the current semiconductor upcycle is not driven solely by AI chip demand, but rather by the simultaneous expansion of multiple supply chains encompassing custom silicon, cloud capital spending, memory, and wafer fabrication equipment. Within this framework, the durability of AI infrastructure investment remains the pivotal variable determining whether the semiconductor cycle's prosperity can be sustained.