Taiwan Semiconductor Manufacturing is developing an advanced chip packaging technology similar to Intel's EMIB, internally referred to as the "EMIB-like" project, and has already begun discussions with select customers.
On July 30, two sources familiar with the matter revealed that engineers at Taiwan Semiconductor Manufacturing (TSM) are advancing the internal project, aiming to deliver a packaging solution with functionality comparable to Intel's EMIB.
Chip packaging represents the final stage of semiconductor production, where different silicon dies are assembled into a single unit and wired together to function as a whole.
Taiwan Semiconductor Manufacturing currently dominates the AI chip packaging market with its CoWoS technology, but the company has recently expanded its packaging capabilities through multiple paths, including releasing development plans for CoWoS glass substrates and establishing a CoPoS pilot production line.
The exposure of the EMIB-like project further enriches the company's advanced packaging technology matrix and reflects the extension of industry competition from process nodes to packaging. Following the report, Taiwan Semiconductor Manufacturing's US-listed shares opened more than 3% higher on Thursday, then continued to expand gains, ultimately closing up 7.6%.
What is "EMIB-like"?
Chip packaging is the final stage of chip production.
Intel's existing EMIB is one of the core technologies addressing advanced packaging demands. The full name of the technology is "Embedded Multi-die Interconnect Bridge." Traditional 2.5D packaging requires laying a large silicon interposer under the chip for connections, while EMIB embeds tiny silicon bridges only where connections are needed, like building a small bridge between two pieces of land rather than paving an entire road.
Recently, this technology has made significant progress, with the yield rate of the EMIB-T version rising to 98%, and it has secured orders from major customers including Nvidia, Google, and OpenAI.
CoWoS is not the end
Taiwan Semiconductor Manufacturing has long supported high-end AI chip packaging needs with CoWoS technology. However, even as the company aggressively expands CoWoS capacity, the industry still expects chip supply shortages to persist beyond 2027.
Nomura Securities estimates that Taiwan Semiconductor Manufacturing's CoWoS capacity target for 2027 will reach 2 million wafers, with Nvidia accounting for approximately 55% of that share.
To address capacity bottlenecks, Taiwan Semiconductor Manufacturing has previously released development plans for CoWoS glass substrates and established a CoPoS pilot production line in Tainan, Taiwan, with mass production expected in the second half of 2028. Nvidia's Feynman architecture GPU will be the first product to utilize this technology.
From an industry landscape perspective, Intel is strengthening its differentiated advantages in advanced packaging through EMIB, while Samsung is also accelerating the layout of next-generation solutions such as glass substrates. Taiwan Semiconductor Manufacturing's addition of an EMIB-like layout on top of CoWoS indicates that the packaging segment has become a new battlefield for leading foundries to compete for technological high ground.