As the memory market boom continues and the wave of A+H share listings gains momentum, the Hong Kong stock market is rapidly forming a vibrant ecosystem for the memory industry. Among the players, GigaDevice (03986) and Montage Tech (06809), originally listed on the A-share market, have already successfully listed in Hong Kong. Companies like Biwin Storage Technology Co., Ltd. (688525.SH) and Shenzhen Longsys Electronics Co., Ltd. (301308.SZ) have also submitted applications, aiming to accelerate their layout with dual A+H financing platforms. Concurrently, a batch of emerging forces from the memory industry chain, including companies like Powerchip Semiconductor Manufacturing Corporation, CoreTigo, Hongxin Yu Electronics, and XSKY, have submitted listing applications to the Hong Kong Stock Exchange seeking their initial public debut. As of now, this wave of capital enthusiasm heading to Hong Kong has not ceased. It has been observed that Giantec Semiconductor Corporation (688123.SH) officially submitted its listing application to the main board of the Hong Kong Stock Exchange on February 6, with China International Capital Corporation Limited acting as the sole sponsor. Giantec's application adds another footnote to this intensifying industry consolidation.

Giantec, established in 2009, has been deeply involved in the memory chip field for over sixteen years and has gradually developed into a globally leading designer of high-performance non-volatile memory chips. The company has established three core business lines: memory chips, mixed-signal chips, and NFC chips and other products. Among these, memory chips are the absolute pillar of the company's business, contributing 88.5% of total revenue in the first three quarters of 2025. Mixed-signal chips accounted for 8.9%, while NFC chips and other products made up 2.6%. Specifically, mixed-signal chips primarily refer to camera motor driver chips, widely used in mobile phone cameras for autofocus and anti-shake functions. NFC chips and other products mainly include smart card chips. As the core focus of Giantec's business, its memory chip product matrix covers several application areas. The first is memory module support chips: the core product is the SPD chip, which fully supports memory modules from DDR2 to DDR5 and is a key component in AI servers and high-performance computing memory systems. The second is high-reliability memory chips for automotive electronics and industrial control: including EEPROM and NOR Flash compliant with the AEC-Q100 standard, deeply applied in core automotive systems such as visual perception, smart cockpits, three-electric systems, chassis transmission, and body control, as well as in industrial automation, digital energy, and power electronics. The third is consumer electronics memory chips: covering high-performance EEPROM and NOR Flash, widely used in terminals like smartphones, IoT devices, and display panels, continuously benefiting from the intelligent upgrade of consumer electronics.

While its memory chips cover multiple applications, Giantec has achieved leading market positions in certain segments. According to Frost & Sullivan data, in the EEPROM field, Giantec is the number one supplier in China and the third largest globally, with an approximate 14.0% global market share in 2024. Furthermore, as of the end of 2025, Giantec was the only supplier in China capable of providing a full series of automotive-grade EEPROM chips. In the DDR5 SPD chip segment, Giantec is the world's second-largest supplier, with a global market share exceeding 40% in 2024.

Financially, Giantec has demonstrated steady growth in recent years. From 2023 to 2024, the company's total revenue increased from RMB 703 million to RMB 1.028 billion. In the first three quarters of 2025, revenue reached approximately RMB 933 million, a year-on-year increase of 21.29%. This revenue growth was primarily driven by three factors: firstly, the accelerated adoption of servers, personal computers, and AI infrastructure, which significantly boosted demand for SPD chips; secondly, the development of smart transportation and the trend towards localization of procurement by automakers, increasing demand for automotive-grade chips; and thirdly, the expansion of applications in industrial control, driving increased demand for industrial-grade memory chips.

Performance on the profit side is equally impressive. From 2023 to 2024, the company's adjusted net profit surged from RMB 141 million to RMB 298 million, a growth rate of 110.7%. In the first three quarters of 2025, the adjusted net profit was RMB 301 million, a year-on-year increase of 25.9%. Although the growth rate moderated compared to 2024, it remained strong. Profit growth stemmed not only from revenue expansion but also from structural improvements in profitability. From 2023 to the first three quarters of 2025, the company's gross margin consistently rose from 46.6% to 59.8%, reflecting an increased proportion of high-value-added products like DDR5 SPD chips and automotive-grade, high-performance industrial-grade EEPROM, coupled with enhanced pricing power. Simultaneously, the ratio of three major expense items to revenue gradually decreased from 37.26% to 24.42%, indicating significant optimization of operational efficiency. Driven by both gross margin improvement and expense control, the adjusted net profit margin steadily increased from 20.1% in 2023 to 32.3% in the first three quarters of 2025. Therefore, Giantec's sustained performance growth results from the combined effect of three dimensions: strong downstream market demand, optimized product mix, and improved operational efficiency. As the major memory cycle continues to evolve, the question remains whether Giantec's value will be reassessed.

The core driver of this "super cycle" in memory is the structural supply-demand imbalance triggered by the AI computing revolution. As AI servers require 8-10 times more memory than traditional servers, especially with HBM becoming a necessity for GPU computing power, high-end memory capacity is being prioritized. Original manufacturers like Samsung and SK Hynix are shifting over 80% of their advanced capacity to HBM and DDR5, causing a cliff-like contraction in the supply of mature process products like consumer-grade DDR4. Concurrently, with the completion of inventory destocking in consumer electronics and the simultaneous recovery of PC and smartphone demand, supply tightness across the entire industry has intensified. Given that memory chip capacity construction cycles last 18-24 months, new supply is a distant solution, and original manufacturers' inventories have fallen to historically low levels of 2-4 weeks. This sharp contradiction between "explosive demand growth" and "rigid supply constraints" has jointly propelled the continuous surge in memory prices, initiating a super-cycle boom that surpasses traditional cycles.

In this cycle, the entire memory industry chain benefits, but the timing and logic of benefits for each segment differ significantly. Downstream module and distribution segments show the highest earnings volatility initially, profiting from the revaluation of low-cost inventory during the early price increase phase, but sustainability is relatively weak. Midstream IDM manufacturers hold the strongest pricing power, able to prioritize capacity allocation to high-margin HBM and premium DRAM, resulting in high and highly certain earnings volatility. Midstream packaging and testing segments benefit from surging chip shipment volumes and demand for advanced packaging, showing significant volume-price synergy. Midstream chip design segments, leveraging technical barriers in niche areas, enjoy pricing advantages, high profit quality, and stable earnings volatility. Upstream equipment and material segments, acting as "shovel sellers" for industry expansion, face the most rigid demand, with expansion orders locked in advance, offering the highest earnings certainty, though short-term volatility is typically lower than midstream and downstream segments.

Giantec operates in the typical midstream chip design segment, but the pricing logic for its various memory chip products differs. Among them, SPD chips are expected to be the core engine for Giantec's earnings growth in this high-growth cycle, driven by the dual forces of "technology iteration premium" and "AI demand explosion." Since early September 2025, the spot price of DDR5 chips has surged over 307%, and the price trend of DDR5 SPD chips has moved in sync with the "super price surge" in the entire DDR5 memory market, laying the foundation for DDR5 SPD chip price increases. Simultaneously, a single AI server requires over 20 DDR5 memory modules, multiplying the demand for SPD chips. Coupled with supply tightness for DDR5 due to original manufacturers prioritizing capacity for HBM and premium DRAM, SPD chips, as essential components for memory modules, significantly benefit from this "volume-price synergy" trend. Giantec's CEO indicated that demand for the company's DDR5 SPD chips is still in a ramp-up phase, with significant volume expected in the third and fourth quarters of 2026. Additionally, Giantec is actively expanding its new product line, launching VPD chips designed for next-generation high-performance storage devices. These chips have become key components in new enterprise-grade solid-state drive (eSSD) modules and CXL memory expansion modules, specifically designed to meet the stringent requirements for storage reliability and parameter management in AI servers and high-performance computing systems. Through collaboration with the global leading memory manufacturer Samsung Electronics, Giantec's VPD chips have already entered the design verification stage.

In contrast to the active volume-price synergy of SPD chips, price increases for Giantec's automotive and industrial memory chips are primarily cost-driven: rising wafer costs due to tight capacity combined with high barriers to automotive certification create a transmission logic of "rigid demand but high costs," manifesting more as passive price increases driven by costs. The key to earnings volatility here lies in the company's ability to successfully pass these upstream wafer cost increases to downstream customers, testing its pricing power in customer relationships. Consumer electronics memory chips mainly follow the industry beta: benefiting from overall industry capacity tightness and broad price increases, also exhibiting characteristics of passive price increases.

Based on the above logic, Giantec stands to benefit significantly from this memory super-cycle. The core logic of its earnings growth lies in firmly grasping the dual main themes of "DDR5 technology iteration" and "AI demand explosion." Particularly, the SPD chip business, as the core earnings engine, directly benefits from the volume-price synergy in the current DDR5 market. Although the driving logic differs across business lines, against the backdrop of across-the-board memory chip price increases, an improvement in the company's overall profitability is certain.

While benefiting from the industry's high-growth红利, Giantec also faces potential business risks and challenges. Firstly, it needs to be cautious that sharp memory price increases could potentially suppress demand in consumer electronics terminals. Goldman Sachs forecasts that global smartphone shipments could decline by 6% and 5% in 2026 and 2027, respectively, due to rising memory prices. Even TrendForce's latest prediction suggests global phone production might decline by 10% year-on-year in 2026. As some of Giantec's memory chips and mixed-signal chips are applied in the consumer electronics field, the earnings volatility of these products could be weakened, necessitating a rational growth outlook for this part of the business.

Secondly, Giantec has a relatively high customer concentration. Data shows that in the first three quarters of 2025, Giantec's largest customer contributed 41.1% of its revenue, and the top five customers together accounted for 59.3%. This deep "symbiotic" relationship could place the company in a relatively passive position in business negotiations. If core customers introduce second suppliers in the future, or if there are shifts in technology roadmaps and industry standards, the company's revenue base could be impacted, which is not conducive to long-term sustainable and healthy development.

Furthermore, supply chain risks warrant continuous attention. Giantec operates on a Fabless model. In the first three quarters of 2025, purchases from its top five suppliers accounted for 85.8% of the total, indicating high dependence on external wafer manufacturing and other links. While this is a common characteristic of the chip design industry, in the current context of persistent upstream capacity shortages, the company's ability to stably obtain sufficient, favorably priced wafer capacity will be a key constraint on its earnings release, directly testing its supply chain management capabilities and pricing power with upstream suppliers.