Taiwan Semiconductor Manufacturing's advanced packaging technology roadmap is undergoing significant adjustments. The mass production timeline for CoPoS has been substantially postponed, elevating the strategic importance of CoWoS. This shift will profoundly impact the investment rationale across the semiconductor packaging supply chain.
According to a recent report, due to higher-than-expected challenges in advancing CoPoS, Taiwan Semiconductor Manufacturing's latest plan indicates that the first CoPoS packaged products will not be available until the fourth quarter of 2030 at the earliest. This represents a delay of approximately two years compared to previous market expectations of mass production readiness by 2028.
Concurrently, Taiwan Semiconductor Manufacturing's CoWoS capacity for the next two years is already fully booked, leading to a significantly extended lifecycle for CoWoS beyond initial projections.
These adjustments imply that supply chain manufacturers betting on early CoPoS mass production face the risk of timeline setbacks. In contrast, equipment and materials suppliers that continue to benefit from the CoWoS and SoIC capacity expansions are expected to maintain order visibility over a longer period. Furthermore, the CoWoP initiative, led by Nvidia and Siliconware Precision Industries, may also be paused, further reshaping the market landscape.
The substantial delay in the CoPoS timeline is primarily attributed to technical bottlenecks. Supply chain sources indicate that the core technical challenges for CoPoS involve issues of uniformity and warpage. Internally, Taiwan Semiconductor Manufacturing had already considered the mass production timeline for CoPoS to be ambitious.
Based on the latest planned milestones, Taiwan Semiconductor Manufacturing will begin installing equipment for research and development in the third quarter of 2026, with the setup of the R&D line expected to take about a year. Equipment orders for the pilot line will not be placed until the third quarter of 2027, with an estimated delivery lead time of three quarters. Pilot equipment is scheduled to enter the Chiayi P7 facility in the second quarter of 2028, followed by approximately a year of verification and adjustments. Mass production equipment is not expected to be finalized and ordered from the supply chain until mid-to-late 2029. After another three quarters for equipment delivery, machines would arrive in the first quarter of 2030, with the first packaged products potentially available by the fourth quarter of 2030.
Notably, it is reported that Taiwan Semiconductor Manufacturing has set extremely high requirements for suppliers participating in the co-development of CoPoS. Some equipment vendors have even been required to sign contracts with restrictive clauses prohibiting the sale of related technologies or machinery to other customers, further raising the barriers to entry and development costs for the supply chain.
Against the backdrop of the CoPoS delay, the strategic value of CoWoS has become more pronounced. Not only have Nvidia and AMD placed large orders, but ASIC clients are also flooding in, resulting in Taiwan Semiconductor Manufacturing's CoWoS capacity being fully booked for the next two years. The monthly capacity at the Tainan AP8 P1 plant is expected to reach over 40,000 units by year-end, with the P2 plant also under construction.
Regarding SoIC, Taiwan Semiconductor Manufacturing plans to significantly increase monthly capacity at its Chiayi plant from the current nearly 10,000 units to 50,000 units by 2027. Nvidia is set to secure the majority of this capacity, with approximately ten percent allocated for co-packaged optics applications. This expansion scale presents a clear positive for hybrid bonding equipment suppliers, with market analysts anticipating corresponding follow-on equipment orders.
Overall, with the continued expansion of CoWoS and the accelerated volume increase of SoIC, supply chain risks over the next several years have decreased substantially compared to previous expectations. The profit visibility for equipment and materials companies has also improved accordingly.
The CoWoP plan, jointly led by Nvidia and Siliconware Precision Industries, may face a postponement. The primary reasons are the higher technical difficulty and costs associated with this technology path, coupled with low participation interest from Siliconware Precision Industries and Taiwanese PCB manufacturers.
The potential shelving of the CoWoP plan further concentrates market attention on Taiwan Semiconductor Manufacturing's own packaging technology roadmap. With CoPoS mass production still distant and CoWoP facing obstacles, CoWoS and SoIC are expected to remain the core pillars of Taiwan Semiconductor Manufacturing's advanced packaging strategy for a considerable time. Consequently, the capital expenditure节奏 and order structures of the related supply chain will be repriced.