A research report from Orient Securities indicates that on April 22, 2026, Anker Innovations showcased its first neural network in-memory computing AI audio chip, Thus. In-memory computing tackles the memory wall bottleneck at the fundamental architectural level and optimizes computational power consumption. Currently, multiple technical pathways for in-memory computing are advancing concurrently and maturing, with domestic players promoting commercial adoption in areas like edge AI and low-power applications. The main viewpoints from Orient Securities are as follows.

On April 22, 2026, Anker Innovations demonstrated its first neural network in-memory computing AI audio chip, Thus. In-memory computing resolves the memory wall bottleneck at the architectural foundation, enhancing computational efficiency regarding power. Some investors may not fully appreciate the potential application of in-memory computing's innovative architecture within AI computation. The traditional von Neumann architecture, proposed in 1945, fundamentally separates computing and memory units, requiring frequent data movement between the processor and memory. However, the rapid advancement of large language models has exponentially increased demands on memory capacity and bandwidth, significantly highlighting the limitations of this separated architecture. Consequently, both academic and industrial sectors are actively promoting the adoption of in-memory computing architectures.

Presently, in-memory computing technology encompasses various approaches, including near-memory computing (where computing units are tightly integrated with memory using advanced packaging), processing-in-memory (adding computational functions to the peripheral circuits of memory chips), and true in-memory computing. Among these, in-memory computing represents the highest level of integration, directly utilizing the physical properties of the memory medium to perform computations within the memory array itself, enabling highly parallel and ultra-low-power processing. Compared to traditional solutions, in-memory computing holds distinct advantages in power consumption and computational efficiency. Using the same manufacturing process, in-memory computing chips have the potential to deliver higher computational power per unit area with lower power consumption. For instance, the WTM2101 chip launched by Zhichun Technology, focused on low-power voice interaction scenarios at the edge, consumes only 5mW of power. It can provide 10 to 200 times the computational power of NPU, DSP, or MCU platforms at equivalent power levels.

Multiple technical pathways for in-memory computing are advancing in parallel, with the technology maturing. Regarding storage media, mainstream technical routes for in-memory computing include SRAM, DRAM, Flash, and novel memristors (such as ReRAM, MRAM, PCM). Among these, SRAM-based in-memory computing solutions utilize CMOS technology, can adopt advanced process nodes, and offer fast read/write speeds. DRAM-based solutions provide higher storage density than SRAM, making them suitable for handling large-capacity model scenarios. Flash-based solutions offer advantages in non-volatility and low power consumption. Currently, products utilizing SRAM, NOR Flash, and DRAM as in-memory computing media have already been brought to market. Emerging memory mediums like RRAM (Resistive RAM), MRAM (Magnetoresistive RAM), and PCM (Phase-Change Memory) possess favorable process scalability and ultra-low power characteristics, and are considered to have significant application potential. At ISSCC 2026, a joint team from Tsinghua University, Huawei, and ByteDance presented a paper on an in-memory computing chip. The paper introduced for the first time a hybrid in-memory computing chip based on a 28nm process, using RRAM as the storage medium. Through innovative architectural design, this chip substantially enhances the efficiency and energy efficiency of core system operations.

The industrial application of in-memory computing is gradually progressing. In fields such as edge AI and low-power applications, domestic companies are advancing commercial implementation. Actions Technology has taken a lead in commercially applying in-memory computing technology within the industry, officially launching AI audio chips targeting edge scenarios. Throughout 2025, shipments of its edge AI audio chip products ATS323X and ATS362X, based on its self-developed mixed-signal SRAM in-memory computing architecture, continued to climb. The ATS323X chip has been rapidly adopted in flagship wireless microphones from brand clients and launched to market, entering the supply chains of several leading professional audio brands. Zhichun Technology's WTM2101, the world's first NOR Flash-based in-memory computing voice chip, has achieved shipments exceeding 10 million units, being used in smart wearable devices from brands like Huawei and Xiaomi. The Thus chip introduced by Anker Innovations is built on NOR Flash technology, natively supporting 4-million-parameter models, and will be featured in Anker's upcoming flagship earbuds. Micro Core, leveraging its 3D-CIM technology architecture, has established deep collaborations with leading domestic memory manufacturers and several major terminal equipment makers. As the head of the RISC-V In-Memory Computing Application Group, it is leading the development of the world's first RISC-V in-memory computing standard initiative in Xiaoshan, Hangzhou. The company received investment from GigaDevice in March 2026.

Investment recommendation and targets: In-memory computing addresses the memory wall bottleneck at a foundational level, and the industry is steadily advancing. Related subjects include GigaDevice, Actions Technology, Henshine Semiconductor, and Anker Innovations. Risks include slower-than-expected AI adoption, pace of technological iteration falling short of expectations, and delays in domestic substitution progress.