At the 2026 NEPCON exhibition in Japan, Intel introduced a groundbreaking prototype that could redefine the future of artificial intelligence hardware: a large glass core substrate measuring 78mm by 77mm, incorporating Intel's Embedded Multi-die Interconnect Bridge (EMIB) technology. This advancement represents a major shift in chip packaging, moving toward larger, more powerful, and more complex designs to meet the demands of next-generation AI.
EMIB functions as a high-speed pathway embedded within the substrate, specifically designed to connect adjacent chips, enabling data transfer as if they were part of a single monolithic chip.
Why must AI chips transition from plastic to glass materials? As AI chips grow in size, pushing the limits of lithography technology, traditional organic substrates face significant physical challenges. Organic materials are prone to deformation under high temperatures due to thermal expansion and contraction, which can lead to poor connections between the chip and the substrate. In contrast, glass has a coefficient of thermal expansion (CTE) very close to that of silicon, ensuring excellent dimensional stability at high temperatures and providing a viable solution.
Furthermore, compared to organic substrates, the ultra-smooth surface of glass allows for the etching of finer circuit patterns. This makes it an ideal base for supporting the powerful computational capabilities and intricate wiring required by next-generation AI accelerators.
In terms of specifications, Intel's prototype features a substantial package size of 78mm by 77mm, twice the size of a standard reticle. Vertically, it employs a sophisticated "10-2-10" stacking architecture. This structure consists of an 800μm (0.8mm) thick glass core, with 10 redistribution layers (RDL) stacked above and below it, forming a total of 20 circuit layers capable of handling complex AI signal transmission. The robust core design is essential for ensuring the mechanical rigidity of such a large package, preventing fractures in high-pressure data center environments. This advanced design also achieves an ultra-fine 45μm bump pitch, offering higher I/O density compared to traditional substrates.
Intel has successfully integrated two EMIB bridges into the package, demonstrating the glass substrate's ability to support complex multi-chip configurations. Compared to organic substrates, glass substrates provide finer interconnect pitch, superior manufacturing depth-of-field control, and lower mechanical stress across the entire component.
Perhaps Intel's most significant announcement is the claim of achieving "No SeWaRe." This industry term refers to the micro-cracks that glass substrates are prone to during cutting and handling. These invisible defects pose a major reliability risk, often causing the entire package to fail during thermal cycling tests. Intel's statement indicates that, through advanced material improvements or proprietary processing techniques, it has overcome the inherent brittleness of glass, ensuring reliability levels suitable for mass production.